A very useful building block in MOS analog circuit design is the current source which ideally provides a current reference which is independent of power supply and temperature variations. Many applications in digital and analog circuit design require such a building block which functions to provide a stable voltage or current. For example, analog MOS circuits provide for direct on-chip interfacing between various digital components and, particularly, provide for the necessary stabilized bias for differential amplifiers, operational amplifiers, comparators and the like. The biasing stage for these circuit types typically consist of current sources or sinks in combination with current mirrors which distribute the developed bias currents to the various stages of an analog circuit.
MOS current sources have come to be widely used in analog integrated circuits both as biasing elements and as load devices for amplifier stages, particularly in applications when the use of such current sources and biasing offer superior insensitivity of circuit performance to power supply and temperature variations. Moreover, MOS current sources are frequently more economical to fabricate on a silicon chip than resistors because they can be implemented with a smaller chip area footprint than corresponding resistors, particularly when the value of the required bias current is very small. In addition, when used as a load element in integrated circuit amplifier stages, the generally high incremental resistance of an MOS current source offers a desirably high voltage gain at relatively low power supply voltage levels.
A typical output current characteristic (the drain characteristic) for a simple current source circuit is illustrated in FIG. 1. The vertical axis is the output current (I.sub.O) while the horizontal axis is voltage (V.sub.ds). The output trace depicts the drain characteristics of a typical current source for both the hypothetical case where the output resistance (r.sub.o) is infinite, i.e., the output current I.sub.o is completely independent of voltage, and the physical case where the output resistance is finite, i.e., the output current is a function of voltage.
The schematic diagram of a conventional two-transistor MOS current source, implemented with n-channel MOS transistors, is illustrated in FIG. 2. The current source includes two n-channel field effect transistors N1 and N2 which each have their source terminals connected to ground potential and their gate terminals commonly coupled together. Their common gate terminals are coupled to the drain of n-channel transistor N1 at a node which is also connected to the bottom of a current set resistor R. A power supply voltage, such as V.sub.DD is connected to the other end of the current set resistor R and provides the voltage source for developing a reference current I.sub.ref across the resistor R.
The reference current I.sub.ref is introduced to the n-channel transistor N1 as a drain current I.sub.D which, as it is developed through transistor N1, causes a voltage V.sub.DS to be developed across the drain and source nodes of the transistor. Since n-channel transistor N1 has its drain node coupled to its gate terminal, it will be understood that the gate-source voltage V.sub.GS will be equal to the drain-source voltage V.sub.DS. In addition, the same gate-source voltage V.sub.GS is developed across the second n-channel transistor N2. In turn, a drain current I.sub.D2 is developed through transistor N2 in accordance with the well understood current-voltage relationship ##EQU1## where:
I.sub.DS2 =the drain source current conducted by transistor N2;
V.sub.GS2 =V.sub.GS1 =the voltage developed across the gate-source terminals of both transistors N1 and N2;
V.sub.T2 =the threshold voltage of transistor N2;
W=the transistor width;
L=the transistor length
k'=the transistor process parameter
Assuming that both transistors N1 and N2 are in saturation (a good assumption under the circumstances) the ratio of drain current through the transistors I.sub.DS2 /I.sub.DS1 =(W.sub.1 L.sub.2)/(W.sub.2 L.sub.1) in the case where V.sub.DS1 =V.sub.DS2. It will thus be understood that in the case where the drain-source voltages are equal, the current ratio is controlled by the geometrical device sizes, i.e., the transistor aspect ratios. Therefore, the amount of current sourced by the basic current source of FIG. 2, I.sub.DS2, is a function of the transistor's aspect ratios and the reference current I.sub.ref developed across the resistor R.
Multiple current sources may be developed by adding additional MOS mirror transistors as shown in FIG. 3. Different source currents (drain currents) are easily provided by merely adjusting the aspect ratios (W/L) of the additional n-channel transistors N3 and N4.
The difficulty with conventional prior art-type current source circuit implementations is that the absolute magnitude of the output current will vary considerably with changes in the various manufacturing process tolerances, as well as variations in temperature and voltage. In particular, variations in the photo lithographic process tend to have a significant effect on what are generally termed "short channel" devices, i.e., devices with very large W/L ratios. Line width variations of approximately .+-.0.1.mu. represent an enormous variation to a W/L ratio for a device having a designed channel length L of 0.375.mu.. It will be evident that such a tolerance variation will have a proportionately smaller effect on a "long channel" transistor whose designed length (L) is on the order of 2.0 to 5.0.mu..
However, as device size increases, device switching time also undesirably increases a corresponding amount. Thus, there exists a trade-off between a particular transistor's performance characteristics and the stability of those characteristics under various tolerance variations.
In addition, it is well understood by those having skill in the art of integrated circuit design that the process dependent parameter k' also varies with respect to other manufacturing process tolerance variations, particularly gate oxide thickness, oxide permitivity and the mobility of carriers in the transistor's conductive channel, in turn a function of the semiconductor's dopant level and concentration gradient. All of these process parameters are subject to inherent variability and at various excursion corners cause a transistor's drain current (I.sub.DS) to vary widely for any given gate-source voltage (V.sub.GS).
Pertinent to the above discussion of current sources and process parameters, is the notion that current source characteristics are proportional to process parameters. Conventionally, a process proportional current source provides a smaller output current when the process is termed "slow" and a larger current when the semiconductor manufacturing process is termed "fast". However, many applications require current sources that are invariant to process parameter drift and, indeed, some applications require current sources that have an inverse proportionality to process parameter variation. Given that the prior art has only developed current source circuitry that merely minimizes the response swings to variations in process parameters, there has been a long felt need for a current source circuit that is not only invariant to process parametric changes but also proportionally inverse.